Semiconductor Stocks: What Is Inside the Semiconductors Theme

The theme applies one test: does the majority of revenue come from designing, manufacturing, packaging, or supplying the semiconductor industry? In practice that means fabless designers, foundries, the equipment that builds fabs, the materials and substrates fabs consume, packaging and test, memory, analog and embedded parts, and the process IP licensed into other companies' chips.

The word doing the work is majority. An enormous number of companies touch semiconductors somewhere: industrial gas suppliers sell into fabs, machine shops make fixtures, software vendors sell to design teams. None of them are semiconductor stocks if the chip industry is a modest slice of what they earn, because nothing about their business changes if wafer starts double or halve. Drop that requirement and the theme drifts into being a general industrials list with a chip label on it, which is the standard failure mode of thematic screens.

The second structural choice is that the theme spans layers rather than picking one. Owning only designers is a bet on end demand and on the fabless business model at the same time. Owning only equipment is a bet on capital spending decided a year before you find out whether you were right. Holding both means the theme contains revenue driven by memory pricing sitting next to revenue driven by industrial production, and those two do not turn on the same schedule. For the general idea, see thematic investing.

Fabless designers specify the architecture, write the software that makes it usable, and sell the finished part without owning a factory. They sit closest to end demand and earn the highest gross margins in the chain, which is why they are the names most people picture when they hear semiconductors. What makes them a layer rather than a list is that all of them depend on three things they do not own: a foundry to turn the design into silicon, memory to sit beside it, and packaging to turn bare die into a usable part.

Also in this layer. Smaller positions that fill out the same function without changing the shape of it.

• Marvell Technology (MRVL). Custom silicon and optical and networking interconnect for data centers.

How this layer relates to the rest. This is where demand enters the chain. Everything below it is derived: a fab gets built because designers expect orders, and a lithography system gets bought because a fab got built. When design orders soften, the effect travels downward with a lag, which is why the layers underneath can still look healthy for a while after the top has turned.

A chip design is a file until someone patterns it onto a wafer, and manufacturing at the leading edge has consolidated into essentially one company. That is not a market-share observation, it is the structure of the industry: building a leading-edge fab takes years, costs an extraordinary amount of capital, and requires process knowledge that cannot be bought. The foundry layer is where the theme's most important dependency and its largest single risk sit in the same place.

How this layer relates to the rest. The foundry converts the design layer's expectations into orders for everything below it: equipment, materials, substrates, and packaging capacity. It is also the theme's one genuinely correlated risk, because a serious disruption to leading-edge manufacturing would be felt by every other layer at once rather than one at a time.

A fab is largely an assembly of purchased tools: lithography systems that pattern the wafer, deposition and etch tools that build up and cut away layers, implanters, cleaning systems, and the inspection equipment that keeps yields from collapsing. The important consequence is that this layer's revenue tracks capital spending on new capacity rather than the price of chips, so it runs on a different clock from the design layer, with backlog and service contracts smoothing part of the swing.

Also in this layer. Smaller positions that fill out the same function without changing the shape of it.

• MKS Inc. (MKSI). Vacuum, photonics, and process-control sub-systems sold into the tool makers themselves.

How this layer relates to the rest. Equipment orders are set by capacity decisions made a year or more earlier, so this layer is the last to feel a demand turn and the last to recover from one. It is what the foundry and memory layers spend money on, which means strength here is evidence of confidence in the layers above rather than of current chip demand.

Every wafer that moves through a fab consumes chemistries, gases, filtration media, and specialty substrates, and every finished die has to be packaged and tested before it becomes a part anyone can buy. This layer bills per wafer and per unit rather than per tool, so its revenue tracks how busy the fabs are rather than how much new capacity is being built. Advanced packaging has also stopped being a back-end afterthought: how memory and logic are assembled together is now a performance variable in its own right.

Also in this layer. Smaller positions that fill out the same function without changing the shape of it.

• Materion (MTRN). Specialty metals and advanced materials, including defense-grade and semiconductor-grade alloys.
• AXT, Inc. (AXTI). Compound semiconductor substrates used in high-speed optical and wireless devices.
• Rogers Corporation (ROG). High-frequency circuit materials for wireless systems and EV power electronics.
• Element Solutions (ESI). Specialty chemistries for advanced packaging and circuit-board manufacturing.

How this layer relates to the rest. This layer turns on utilization, which makes it the most direct read on whether capacity that was already built is being used. It depends on the foundry and memory layers for volume, and it constrains them in return, because packaging and substrate capacity have both become bottlenecks that no amount of wafer supply can route around.

Memory is the part of the theme that behaves least like the rest of it. DRAM and NAND are largely fungible products priced by the balance of supply and demand, so revenue can swing violently even when unit demand is steady, and capacity added in an upturn routinely arrives in time to make the next downturn worse. High-bandwidth memory has changed the mix, because accelerators need it and it is harder to make, but the underlying business is still a pricing business rather than a design one.

Also in this layer. Smaller positions that fill out the same function without changing the shape of it.

• Rambus (RMBS). Server memory interface chips and licensed memory IP, a royalty-shaped read on memory content.

How this layer relates to the rest. Memory usually turns first, both down and up, which makes it the earliest signal in the theme and the least comfortable one to hold through. It competes with logic for the same advanced packaging and foundry-adjacent capacity, and it drives a large share of the equipment layer's order book, so a memory capex pause is felt two layers away.

Not every chip is made at the leading edge. Analog and embedded parts run on mature nodes, stay in production for many years, and sell into industrial, automotive, and consumer markets that have nothing to do with data-center capex. This layer exists in the theme precisely because it is out of phase with the rest of it, and it is the main reason the semiconductors theme is broader than an AI theme wearing a different name.

Also in this layer. Smaller positions that fill out the same function without changing the shape of it.

• Atomera Incorporated (ATOM). Licenses a process technology that fabs can insert into existing manufacturing flows.

How this layer relates to the rest. Analog demand follows factory automation, vehicle production, and general industrial activity, and it historically lags the broader chip cycle by a couple of quarters rather than leading it. That makes this layer the counterweight to memory at the other end of the roster, and it is what keeps the theme from being a single position on one end market.

Read top to bottom, the theme is a chain of derived demand. Someone decides to build a data center or a car or a phone, which becomes an order for a designed chip, which becomes wafer starts at a foundry, which becomes consumption of chemistries and substrates, packaging capacity, and memory content, and which, if the foundry believes the demand will persist, becomes an order for equipment that arrives years later. Each step down the chain is further from the end customer and slower to react.

That lag structure is why the constituents do not move for one reason. Memory usually turns first, because pricing responds immediately to the balance of supply and demand. Designers turn next, as orders and guidance adjust. Materials and packaging follow utilization down. Equipment turns last, because it is being paid for out of decisions made when the cycle looked different, and its backlog can keep results respectable well after the top has passed. Analog and embedded sit on a separate clock again, tracking industrial and automotive activity rather than data-center capex, and historically lagging the broad chip cycle rather than leading it.

The practical consequence is that a semiconductor roster can look internally contradictory in any given quarter without anything being wrong. Memory can be falling while equipment backlogs look strong. Analog can be soft for a year while accelerator demand is the loudest story in the market. Understanding which layer is telling you what is more useful than any ranking of the 18 names.

Most sector investing is a question about share: who is winning, who is losing, and at what price. Parts of this theme work that way, but the parts that make semiconductors different do not. One company in the world makes extreme ultraviolet lithography systems. One foundry makes the overwhelming majority of leading-edge logic. Chip design tools are effectively a duopoly. A handful of suppliers dominate individual process steps, and some specialty substrates and chemistries have one or two credible sources worldwide.

That means a meaningful part of the theme is not a position on market share at all. It is a position on irreplaceability: on the fact that if the industry wants to keep advancing, it has no route around a particular company. That exposure behaves differently. It is largely immune to the competitive questions that dominate analysis of the design layer, and it tends to hold pricing power through periods when customers are under pressure.

It is also not a free lunch, and the theme should not be sold as one. Irreplaceability protects price, not volume. A monopoly on a machine that nobody is buying this quarter still has a bad quarter, and the chokepoint names are the most exposed of all to export policy, since a rule change can remove a set of customers without any change in the business. The useful distinction when reading this roster is which names are share stories and which are irreplaceability stories, because they fail in completely different ways.

A membership test is only credible if it excludes things. These are the names people most often expect to find here. Some of them fail the test outright. Two of them would pass it and are still absent, and it is worth being straight about which is which.

• Apple and the device makers that design their own silicon. They employ world-class chip design teams, but they sell devices and services. Silicon is a cost centre that makes the product better, not a revenue line, so they fail a test that asks where the money actually comes from. Include them and the theme becomes a consumer-hardware list.
• The hyperscale cloud platforms. They are the largest buyers of chips in the world and several design their own accelerators, but their revenue is cloud, advertising, and software. They belong to the AI infrastructure theme, where being the buyer of the capex is the thesis rather than an aside.
• Samsung Electronics and SK hynix. Both are enormous memory manufacturers, and neither has an ordinary US listing available in a normal brokerage account. That is a gap rather than a judgement: it is the reason the memory layer of this theme rests on a single name, and it is worth knowing that the theme's memory exposure is narrower than the industry's.
• Intel. It plainly is a semiconductor company, so this one is a roster decision rather than a test failure. The theme expresses leading-edge manufacturing through the contract foundry that most designers actually use, whereas the case for an integrated manufacturer currently turns on whether its own process and foundry effort succeeds, which is a company-specific turnaround question rather than exposure to an industry chokepoint.
• The EDA software vendors. Chip design tools are one of the real chokepoints in this industry, effectively a duopoly that every design in the theme passes through, and they would clear the supplier test comfortably. They are not in the roster, which means the theme owns the manufacturing chokepoints but not the design-tool one. That is the most significant known gap in the membership as it stands.

The hyperscaler case is the one worth dwelling on, because it defines a boundary rather than a technicality. The cloud platforms are the demand behind much of what this theme sells, and several design their own accelerators, but their revenue is cloud and advertising. They sit in the AI infrastructure theme, which is the tighter of the two: it holds the names whose revenue tracks AI training and inference spending, buyers included. Semiconductors is deliberately wider, holding analog, materials, substrates, and process IP that would never qualify as AI exposure. Several names, including the largest designers, the foundry, and the lithography monopoly, appear in both, which is what you would expect when one theme is a subset of an industry the other describes in full.

All 18 names, grouped by the layer they occupy rather than ranked, so the shape of the theme is visible at once.

10 of the 18 define their layers and carry most of the theme's weight in any reasonable construction. The rest are smaller, more specialised positions in the same functions, and a perfectly coherent version of this theme holds far fewer than 18 names.

The passive route is a sector fund, and it answers a different question. SMH and SOXX, the two funds the theme names as its proxies, hold whatever their index defines as a chip company, at weights set by rules you do not control. In practice that means the largest names drive most of the result: SMH is the more top-heavy of the two, while SOXX caps individual weights more aggressively for broader coverage. Either way, you get the industry and you accept a roster and a weighting scheme you did not choose. See the best semiconductor ETFs roundup for the fund comparison itself.

A theme inverts the trade. You know exactly which layers you own, which name represents each one, and what weight it carries, and you accept the work of maintaining that. The difference shows up most in the layers a market-cap index underweights by construction: materials, substrates, packaging, and process IP are small companies in an industry of giants, so a cap-weighted fund gives you very little of them no matter how central they are to how chips actually get made. Neither route is automatically better. The fund is the simpler instrument, the theme is the more deliberate one.

A list of 18 names is an input, not a portfolio. What turns one into the other is structure: which layers you want exposure to, what weight each name carries, and whether the concentration you end up with was chosen or inherited.

• Pick the layers before the names. The choice between share stories and irreplaceability stories changes the character of the position far more than swapping one designer for another.
• Decide the memory weight deliberately. Memory is the one holding that can dominate the portfolio's behaviour in both directions, because its cycle is sharper and out of phase with everything else on the list.
• Check what you already own. Broad index funds and large-cap holdings usually already contain the biggest chip names at meaningful weights, so a dedicated position can add more concentration than intended rather than new exposure.
• Set target weights that sum to 100. Equal weighting is a choice, and so is tilting toward the chokepoints. Both are defensible. Not deciding is what leaves you concentrated by accident after one name runs.
• Frame it against a benchmark. A narrow industry position should be judged against SMH, SOXX, or the S&P 500, because the extra concentration has to be buying you something.
• Revisit as weights move. Dispersion inside this roster is wide, so target weights drift fast and a portfolio left alone becomes a different portfolio.

This is what Walnut is built for. You describe the thesis, the AI assistant proposes constituents and weights you can edit, the portfolio tracks as one performance line against the S&P 500, and you place trades you approve yourself at your own broker. Walnut is informational and does not tell you which stocks to buy.

For the companion view of which chip names are most widely held and discussed, see best semiconductor stocks. For the demand side that much of this chain is currently building capacity for, see best data center stocks.

The semiconductors theme is 18 companies across six layers of a single supply chain, and the layering is the whole idea. The designers decide what chips do and sit closest to end demand. One foundry turns most of those designs into silicon. One company makes the lithography systems that foundry cannot operate without, and another supplies tools at nearly every other process step. Materials and packaging bill per wafer and per part. Memory runs a pricing cycle of its own. Analog and embedded track factories and vehicles rather than data centers.

Read as a flat list, it looks like eighteen ways to own the same trade. Read as layers, it is a set of positions with different clocks and different failure modes, several of which are about being impossible to replace rather than about winning share. That structure is what you are deciding whether to own, and how much of. Nothing here is a recommendation, and Walnut is not an investment adviser.